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Silicon Innovation Systems
Silicon Innovation Systems
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    • Home
    • Design Services
      • VLSI Design Services
    • Courses
      • Offered Courses
      • Analog Layout
      • Physical Design
      • Memory Layout Design
      • Standard Cell Layout
      • Analog Circuit Design
      • Fin-Fet Layout Design
      • ASIC Verification
      • RTL Coding & FPGA Design
      • Embedded Systems
    • Contact Us

  • Home
  • Design Services
    • VLSI Design Services
  • Courses
    • Offered Courses
    • Analog Layout
    • Physical Design
    • Memory Layout Design
    • Standard Cell Layout
    • Analog Circuit Design
    • Fin-Fet Layout Design
    • ASIC Verification
    • RTL Coding & FPGA Design
    • Embedded Systems
  • Contact Us

Welcome To ASIC Verification Course

Mainly focused on enhancing the Design Verification skills needed by industry. The curriculum is designed to include the latest methodologies being adopted by industry. By end of the course, you will have hands-on experience in design and verification with Verilog, system Verilog (SV) in UVM methodology.

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Course Highlights

CAD TOOLS

Mode Of Training

Mode Of Training

We are providing the best industry standard tools for designing.

Mode Of Training

Mode Of Training

Mode Of Training

We only provide offline courses to give the industrial experience to the students.

Expert Trainers

Course Eligibility

Course Eligibility

Our Trainers are having more than 15+ years of industry experience to provide the best quality training.

Course Eligibility

Course Eligibility

Course Eligibility

B.E/B.Tech/Diploma in ECE/EEE.

M.E/M.Tech/M.S in VLSI System Design/Embedded Systems/Digital Electronics

Fin-Fet Layout Design Course Curriculum

Module 1 : Basics of Unix/Linux

Introduction to Unix/Linux OS Architecture.   UNIX Directory Structures and Unix Commands.   UNIX Shells   LAB Exercises. 


Module 2 : Advanced Digital Electronics and Digital Logic Designs

Revision of Digital Electronics.  Basics of CMOS Logic Design and Realization of Digital Circuits.   Advanced Arithmetic and Logic Designs.   Logic Design using ROM, PLA, PALs   ASIC, and FPGA Design Flows and Architectures.  


Module 3 : Computer Architecture, Microprocessors and Micro Controllers

Revision of 8086 and 8051 Architectures and Instruction Set   RISC and CISC Processor Architectures   Programming (ASM). Introduction to Modern System Level Architectures.  


Module 4 : Scripting Languages (Widely Used in Industry)

Basics of PERL and TCL.   Introduction to Process Automation using Perl Scripting.  


Module 5 : EDA Tool Introduction

Logic Simulation Tools - Questa Sim.   Logic Synthesis Tools. 


Module 6: HDLs For Digital Logic Design and Verification

Introduction to HDLs.   HDL Flows.  


Module 7: Digital Logic Design and Verification using Verilog


Module 8: Mini Project on Verilog


Module 9: Introduction to Logic Synthesis


Module 10: Introduction to Object Oriented Programming


Module 11: Design Verification using System Verilog

Introduction to System Verilog.  Introduction to Object-Oriented Programming.  Threads and Mailbox's Introduction to Callbacks.   Functional Coverage Introduction to Assertions. 


Module 12: Mini Project on System Verilog


Module 13: Introduction to Verification Methodologies


Module 14: Design Verification using UVM.

Introduction to UVM Methodology.   Testbench Architecture.   UVM Phases   TLM Overview.   UVM Sequences and Sequencers   Building a Scoreboard   Building a Reusable Environments.  


Module 15: Mini Project on UVM


Module 16: Introduction to ARM System Architecture


Module 17: Introduction to Communication Bus Protocols


Module 18: Developing Verification Plan, Test Plan, Functional Coverage Pla


Module 19: Gate Level Simulations


Module 20: Soft Skill Development Programs

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Institute Of Silicon Innovation Systems

Office Address: #No 12,8th main, 4th cross, Bommanahalli Hosur main road, Bangalore 560068.

Phone: 08095574545

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Silicon Innovation Systems

#No 12,8th main, 4th cross, Bommanahalli Hosur main road, Beside Prashanth Hospital, Bangalore 560068

Email: hr@instituteofsis.com Mobile: 8095574545

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